Experience

Organizations

  • Co-Founder and COO @ KATech Software Ltd – The Students and Professionals World [Jan 2018 – Current]

KATech (www.katech.ie) is a software limited company registered with the Republic of Ireland and based in Dublin. KATech was formed in early 2018. We aim to revolutionize software technology by bringing innovation to e-commerce & education sectors through the unique user-friendly environment and ultra-smart design.

 
  •  President @ TecHub – Igniting curiosity and bringing ideas under spotlight [Nov 2015 – Sept 2016]

TecHub (www.techub.ie) was a non-profit student organization, powered by EMWITECH in Pakistan. TecHub aimed to promote research culture and encourage people to work dynamically on new researches and come up with innovations.

Teaching Activities

Demonstrator, School of Computer Science, UCD, Dublin (September 2016 – Current)

Following is the list of modules I have been demonstrating at UCD:

  • Processor Design (COMP30080) – Fall 2018
  • Digital System (COMP20020) – Fall 2018
  • Computer Science for Engineers II (COMP20080) – Fall 2018
  • High Peroformance Computing (COMP40730) – Spring 2018
  • Information Visualisation (COMP30750) – Spring 2018
  • Computer Programming II (COMP10120) – Spring 2018
  • Unix Programming (COMP20200) – Spring 2018
  • Processor Design (COMP30080) – Fall 2017
  • Digital System (COMP20020) – Fall 2017
  • Object-orientated programming (COMP30070) – Fall 2017
  • Computer Programming II (COMP10120) – Spring 2017
  • Unix Programming (COMP20200) – Spring 2017
  • Cloud Computing (COMP41110) – Fall 2016

Research Activities

Doctoral Researcher @ Heterogeneous Computing Lab (HCL) , UCD, Dublin (Sept 2016 – Present)

The Heterogeneous Computing Laboratory (HCL) aspires to be one of the world research leaders in the field of high performance heterogeneous computing. The vision is to propose and develop innovative ideas, models, algorithms and tools aimed at efficient and reliable solution of most challenging scientific and engineering problems on modern highly heterogeneous and hierarchical HPC platforms.

Research Associate @ EMWITECH (July 2015 – Sept 2016)

EMWITECH is a research platform for Embedded and Wireless Technology. This platform covers research in the domain of Advanced computer architecture specifically buffer architectures, Reconfigurable Multicore processors and Artificial intelligence. EMWITECH also focuses research in the area of computer networks, Network security and secure communication.

Team lead in a research project titled, “EMWIBENCH: A Benchmark suite for Hard Real time Systems”

(Project Description) Benchmarking has become an important part of design process for performance analysis of design based systems and is generally used as a tool for comparative analysis of various architectures.  The concept of using benchmarks for performance characterization of the system is a common practice and some processor manufacturers have proposed their own benchmarks . However such benchmarks usually show better performance on the manufacturer’s own platform, and may be biased in design to outperform a contender. Therefore third party benchmarks are a good way to compare the performance amongst various architectures impartially and transparently. A real-time (RT) system is one that must process information and produce a response within a specified time, else risk severe consequences, including failure. RT systems are of two types, i.e.,

  1. Soft RT systems
  2. Hard RT systems

Soft RT systems are not subject to strict deadlines. Whereas, HRT systems are periodic activities that receive, process, and send messages. Each instance of a task is characterized by a hard deadline, within which it has to be completed. Real-time multiprocessors are used in numerous fields such as military equipment, avionics, automotive industry, digital signal processing, network routers and many more. The importance of using multiprocessor systems in such applications is very high, mainly because the execution time must be the same along the process execution, i.e. no delays being accepted. Benchmarks are realistic models of real applications so there exists a need of real-time embedded systems benchmark. Our Benchmark suite is targeting Hard real time systems, i.e., jet engines, embedded microprocessors, digital media, automotive, and other application areas. This suite can also be used for general-purpose performance analysis.

Research Assistant @ Advanced Computer Architecture Lab, HITEC University, Pakistan (September 2013 – November 2015)

(Project Description) The saturation of design complexity and clock frequencies for single-core processors have resulted in the emergence of the multicore architectures as an alternative design paradigm. In the recent trends, multicore/ multithreaded computing systems are not only a de facto standard for high-end applications but are gaining popularity in the field of embedded computing. The advanced level research on multicore architectures requires the development of a high-end test bed for the exploration of hardware and software. Therefore, we propose an FPGA based multicore reconfigurable architecture that will support MS and Ph.D. level research and development in the areas of multicore-processing including core design, memory management, thread scheduling, application support, inter-processor communication, debugging, power management, run-time reconfiguration, real-time applications and many more. The scope of this research project included the development of an FPGA based reconfigurable multi-core architecture that supports runtime reconfiguration of cache size and associativity, number of cores and operating frequency. Using the performance counters we were able to have a feedback of energy consumption, application throughput, and cache miss rate. The project also included the development of Fuzzy logic, Neural Nets, Game Programming or similar Artificial Intelligence (AI) based algorithm to strike a balance between throughput and energy consumption of work-load (applications).

(Contributions & Tasks) As a RA my duties/tasks and contributions in this project were,

  • Mathematical modeling of energy and throughput for Caches in MPSoCS and analytical evaluation/ verification of models. 
  • Exploring Cycle accurate full system simulators i.e. MARSS. Developing configuration for XEON multicore processors and various other processor simulators e.g Cacti, MCPAT etc. 
  • Updating OS on system simulators, Kernel level OS optimization, Analyzing various processor parameters
  • Development of parallel programming models, Development of Hard real-time Benchmarks. Improving JetBench
  • Design space exploration (DSE) as an online technique for reconfigurable architectures.
  • Supervision of summer interns. 
  • Research articles write-up, edit and proofread. 
  • The arrangement of technical workshops. 
  • Website development and content management.